module mylift(req_floor,in_c_floor,clk,reset,complete,direction,out_c_floor);
input[7:0]req_floor;
input[7:0]in_c_floor;
input clk;
input reset;
output direction;
output complete;
output[7:0]out_c_floor;
reg r_direction;
reg r_complete;
reg [7:0]r_out_c_floor;
reg[25:0]clk_count;
reg clk_200;
reg clk_trigger;
assign direction = r_direction;
assign complete = r_complete;
assign out_c_floor = r_out_c_floor;
always@(negedge reset)
begin
clk_200= 1'b0;
clk_count=0;
clk_trigger= 1'b0;
r_complete=1'b0;
end
always@(posedge clk)begin
if(clk_trigger)begin
clk_count=clk_count+1;
end
if(clk_count==499999999)
begin
clk_200=~clk_200;
clk_count=0;
end
end
always@(req_floor)begin
clk_trigger=1;
clk_200=~clk_200;
r_out_c_floor<= in_c_floor;
end
always@(posedge clk)begin
if(!reset)begin
if(req_floor > r_out_c_floor)begin
r_direction=1'b1;
r_out_c_floor <= r_out_c_floor +1;
end
else if(req_floor < r_out_c_floor)begin
r_direction=1'b0;
r_out_c_floor <= r_out_c_floor - 1 ;
end
else if(req_floor == r_out_c_floor)begin
r_complete=1'b1;
r_direction=0'b0;
end
end
end
endmodule
Test Bench
#10 clk = 1'b1; reset = 1'b0;
#10 reset = 1'b0;
#10 reset = 1'b1;
#10 req_floor = 8'b00101000; in_c_floor = 8'b00000111;
#10 reset = 1'b1;
#10 reset = 1'b0;
#10 req_floor = 8'b00101000; in_c_floor = 8'b00000111;
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
end
always #10 clk=~clk;
endmodule
input[7:0]req_floor;
input[7:0]in_c_floor;
input clk;
input reset;
output direction;
output complete;
output[7:0]out_c_floor;
reg r_direction;
reg r_complete;
reg [7:0]r_out_c_floor;
reg[25:0]clk_count;
reg clk_200;
reg clk_trigger;
assign direction = r_direction;
assign complete = r_complete;
assign out_c_floor = r_out_c_floor;
always@(negedge reset)
begin
clk_200= 1'b0;
clk_count=0;
clk_trigger= 1'b0;
r_complete=1'b0;
end
always@(posedge clk)begin
if(clk_trigger)begin
clk_count=clk_count+1;
end
if(clk_count==499999999)
begin
clk_200=~clk_200;
clk_count=0;
end
end
always@(req_floor)begin
clk_trigger=1;
clk_200=~clk_200;
r_out_c_floor<= in_c_floor;
end
always@(posedge clk)begin
if(!reset)begin
if(req_floor > r_out_c_floor)begin
r_direction=1'b1;
r_out_c_floor <= r_out_c_floor +1;
end
else if(req_floor < r_out_c_floor)begin
r_direction=1'b0;
r_out_c_floor <= r_out_c_floor - 1 ;
end
else if(req_floor == r_out_c_floor)begin
r_complete=1'b1;
r_direction=0'b0;
end
end
end
endmodule
Test Bench
#10 clk = 1'b1; reset = 1'b0;
#10 reset = 1'b0;
#10 reset = 1'b1;
#10 req_floor = 8'b00101000; in_c_floor = 8'b00000111;
#10 reset = 1'b1;
#10 reset = 1'b0;
#10 req_floor = 8'b00101000; in_c_floor = 8'b00000111;
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
end
always #10 clk=~clk;
endmodule
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